Analogue in-memory chip performs Fourier transforms of 65,536 points

A team from Sandia National Laboratories, Infineon Technologies and Arizona State University has shown how to run large Fourier transforms on an analogue in-memory computing chip. Their system handled transforms of 65,536 points, whereas earlier analogue chips were shown only up to 128 points. The work, led by T. Patrick Xiao, is reported in Nature Electronics.

Why Fourier transforms are hard for analogue hardware

A Fourier transform reveals which frequencies make up a signal and how strongly each contributes. It is widely used to analyse sound and images. Digital processors usually compute it with the fast Fourier transform (FFT), which repeatedly splits a large transform into smaller ones. This gives the well-known O(N log N) scaling of time and energy with transform size.

Analogue in-memory computing, which uses continuous physical quantities such as voltage, is attractive because of its energy efficiency. It is particularly good at matrix multiplication, which underlies much AI processing. Large Fourier transforms, however, have not traditionally been run on it. The FFT works by splitting problems into the smallest pieces possible, whereas matrix hardware performs better as the matrix grows, up to the physical size of the memory array. Reconciling the two was the central difficulty.

Dividing until the problem fits the array

The researchers used an early formulation of the FFT that splits each transform into two smaller ones, and applied it repeatedly. They stopped dividing once a sub-problem matched the physical size of the memory array. According to Xiao, this means an array of any size can in principle compute very large FFTs, although energy efficiency is best when the number of divisions is minimised, so larger arrays are preferable.

The chip uses SONOS flash memory, in which each cell traps charge in a thin insulating layer and keeps its value without power. The cells stored the coefficients of the discrete Fourier transform, which are complex numbers with real and imaginary parts. The team used more than half a million flash devices at once in a single array for one matrix multiplication. Xiao said the precise controllability of SONOS cells helps keep error accumulation manageable at that scale. The key operations run in parallel on the analogue chip, while other steps are completed digitally.

Potential uses at the edge

The researchers' modelling suggests the approach could lower the energy needed for signal processing. That is relevant to edge computing, where devices process data locally, often on sensor platforms with strict power and chip-area limits. A single chip could then support both FFT-heavy signal processing and matrix-heavy AI workloads at low power.

Christopher Bennett, the paper's last author, suggested that a satellite carrying an analogue coprocessor could produce optical or radar images of much higher resolution or scale. He also pointed to remote sensing tasks such as wildfire detection and land change monitoring, and to real-time sensing on long drone flights. These are projections rather than demonstrated results.

Limitations and next steps

So far the method has been demonstrated on one-dimensional audio signals and two-dimensional images, and the authors regard these as preliminary evidence of viability. Analogue in-memory computing introduces some error. Xiao said this can be reduced through more precise devices and circuits and through algorithmic corrections, but how far it affects real tasks remains to be tested.

The team plans to evaluate the chip on complex workloads that combine FFTs with other computations, such as in-sensor processing that pairs FFT-based signal processing with AI algorithms. Future studies could also assess energy use against the specific budgets of platforms such as satellites and unmanned aerial vehicles. For researchers in hardware and signal processing, the result suggests that the efficiency gains of analogue computing need not be confined to matrix multiplication alone.

Source: Team unlocks large-scale Fourier transforms for analog in-memory computing (Tech Xplore, 8 November 2026).

Image: AI-generated illustration.